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Showing posts with label conditional program flow control. Show all posts
Showing posts with label conditional program flow control. Show all posts

Write assembly language code for all type of the conditional overgflow and signed program flow control instructions

;Write assembly language code for all type of the conditional overgflow and signed
;program flow control instructions
        TTL transfer
        AREA Myprog, CODE, READONLY
ENTRY
        EXPORT main
main
;Table1: Conditional branch instructions for overflow detections
;==============================================================================
;Required branch control                   Unsigned data           Signed data
;==============================================================================
;If (overflow(R0 + R1)) then branch            BCS label            BVS label
;If (no_overflow(R0 + R1)) then branch         BCC label            BVC label
;If (overflow(R0 – R1)) then branch            BCC label            BVS label
;If (no_overflow(R0 – R1)) then branch         BCS label            BVC label
;==============================================================================

;Table2: Conditional branch instructions for positive or negative value detection
;==============================================================================
;Required branch control             Unsigned data                 Signed data
;==============================================================================
;If (result >=0) then branch         Not applicable                  BPL label
;If (result < 0) then branch         Not applicable                  BMI label
;==============================================================================
;unsigned overflow detection/ carry flag based branch
        LDR R6,=0xFFFFFFFF
        LDR R5,=0x00000001
LOOP11    ADDS R6,R6,R5
        ; during first addition carry flag is set, ans is C=1 R6=0x00000000
        ; during second addition carry flag is reset, ans is C=0 R6=0x00000001
        BCC LOOP10            ;branch if  C=0
        BCS LOOP11            ;branch if C=1
;above example peform the overflow for addition operations
;for subtraction you can do it by your own         
        
;Signed overflow incorporate signed ov, carry and Signed flag        
LOOP10
        LDR R6,=0xFFFFFFFF
        LDR R5,=0x80000000
LOOP12    ADDS R6,R6,R5
        ; during first addition sign change and ov flag is set, ans is N=0,C=1,ov=1 R6=0x7FFFFFFF
        ; during second addition sign changes and ov flag is reset, ans is N=1,C=0,ov=0 R6=0xFFFFFFFF
        BVC LOOP13                  ;branch if V=0
        BCS    LOOP15                ;branch if C=1
LOOP15    BPL LOOP16        ;branch if N=0
LOOP16    BVS LOOP12        ;branch if V=1
LOOP13    BCC LOOP14        ;branch if C=0
LOOP14    BMI done        ;branch if N=1
done
        SWI &11
        END

Write assembly language code for all type of the conditional for value comparison operations

 ;Write assembly language code for all type of the conditional for value comparison operations
 TTL transfer
        AREA Myprog, CODE, READONLY
ENTRY
        EXPORT main
main
;*****************************conditional instructions***************************        
;Table: Conditional branch instructions for value comparison operations
;=============================================================================
;Required branch control             Unsigned data                Signed data    
;=============================================================================
;If (R0 equal R1) then branch         BEQ label                    BEQ label        
;If (R0 not equal R1) then branch     BNE label                    BNE label        
;If (R0 > R1) then branch             BHI label                    BGT label        
;If (R0 >= R1) then branch            BCS label/BHS label          BGE label        
;If (R0 < R1) then branch             BCC label/BLO label          BLT label        
;If (R0 <= R1) then branch            BLS label                    BLE label        
;=============================================================================
        MOVS R1,#3
        MOVS R2,#3
        MOVS R3,#4
;for signed and unsigned equ and Not equ
        CMP R2, R1            ; compare the R2 with R1 and reflect the status in FLAGS       
        BEQ LOOP3            ;branch if R2 = R1
        
LOOP3    CMP R2,R3     ; compare the R2 with R3 and reflect the status in FLAGS   
        BNE LOOP4_1        ; branch if R2 != R3

;unsigned greater than/equal and less than/equal
LOOP4_1    MOVS R1,#5    ;Loop counter starting value is 5
LOOP4
        ADDS R4, #1
        CMP R1, R4
        BLO LOOP5       ;branch if R1<R4/ R1 is lower than R4
        SUBS R1, #1
        BHI LOOP4        ;branch if R1 is higher than 1
        
LOOP5    MOVS R1,#6    ;Loop counter starting value is 6              
        ADDS R4, #1
        CMP R1, R4
        BLS LOOP6        ;branch if R1<= R4/ R1 lower than or same to R4
        SUBS R1, #1
        BHS LOOP5        ;branch if R1 is higher and same to 1

;signed greater than/equal and less than/equal
LOOP6    MOVS R1,#5    ;Loop counter starting value is 5
        MOVS R4,#0    ;Set R4 to zero
LOOP7
        ADDS R4, #1
        CMP R1, R4
        BLT LOOP8        ;branch if R1<R4
        SUBS R1, #1
        BGT LOOP7        ;branch if R1>1
        
LOOP8    MOVS R1,#6    ;Loop counter starting value is 3              
        ADDS R4, #1
        CMP R1, R4
        BLE done        ; branch if R1<=R4  
        SUBS R1, #1        
        BGE LOOP8        ; branch if R1>=1
done
        SWI &11
        END

Write a ARM cortex M0+ assembly language code based on arithmatc and logical instructions.

 Problem 1: Implement following code conversions to convert binary no 0x89ABCDEF(32-bits) into a) BCD (64-bits)   b) Gray (32-bits) Problem...