Solution:
;code prepared by PAILLA RAGHAVENDRA REDDY
TTL ascending
AREA Myprog, CODE, READONLY
ENTRY
EXPORT main
main
LDR R7,=0x1FFFF100 ; initialize base address to register r7
LDR R6,=0x00000000 ; inner loop shift value register r6
LDR R5,=0x00000000 ; outer loop shift value register r5
LDR R1,[R7,R6] ; fetch first value for loop to the R1
ADDS R7,R7,#0x04 ; Shift base address
LSLS R1,R1,#0x02
SUBS R1,R1,#0x04
LAB2 LDR R2, [R7,R5]
ADDS R6,R6,#0x04
NEXT LDR R3, [R7,R6]
CMP R3,R2
BLO LAB1
STR R3,[R7,R5]
STR R2,[R7,R6]
LDR R2,[R7,R5]
LDR R3,[R7,R6]
LAB1 ADDS R6,R6,#0x04
CMP R6,R1
BLS NEXT
ADDS R5,R5,#0x04
MOV R6,R5
CMP R1,R6
BEQ done
CMP R5,R1
BNE LAB2
done
SWI &11
END
Input:
Result:
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